发明名称 SEMICONDUCTOR DEVICE AND METHOD INCLUDING REDUNDANT BIT LINE PROVIDED TO REPLACE DEFECTIVE BIT LINE
摘要 A method includes selecting a word line included in one of a plurality of memory mats based on a row address, where each of the plurality of memory mats includes a plurality of word lines, a plurality of bit lines, and a redundant bit line, selecting one of the bit lines included in the selected memory mat based on a column address, selecting, by a column relief circuit, the redundant bit line in place of the one of the bit lines to be selected based on the column address, in response to the column address indicating a defective address, activating the column relief circuit when the row address is supplied in response to a first command, and inactivating the column relief circuit when the row address is supplied in response to a second command.
申请公布号 US2014140155(A1) 申请公布日期 2014.05.22
申请号 US201414163368 申请日期 2014.01.24
申请人 RIHO YOSHIRO;MIZUKANE YOSHIO;NODA HIROMASA 发明人 RIHO YOSHIRO;MIZUKANE YOSHIO;NODA HIROMASA
分类号 G11C29/00 主分类号 G11C29/00
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