发明名称 |
Method of batch trimming circuit elements |
摘要 |
Multiple wafers that each has multiple high-precision circuits and corresponding trim control circuits are batch trimmed in a process where each wafer is formed to include openings that expose trimmable circuit elements that are internal to the circuitry of the high-precision circuits. The high-precision circuits and trim control circuits are electrically activated during the trimming phase by metal traces that run along the saw streets. The method attaches a wafer contact structure to each wafer to electrically activate the metal traces. The method places the wafers with the wafer contact structures into a solution where the exposed trimmable circuit elements are electroplated or anodized when the actual output voltage of a high-precision circuit does not match the predicted output voltage of the high-precision circuit. |
申请公布号 |
US8378460(B2) |
申请公布日期 |
2013.02.19 |
申请号 |
US20100978492 |
申请日期 |
2010.12.24 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION;HOPPER PETER J.;JOHNSON PETER;SMEYS PETER;FRENCH WILLIAM |
发明人 |
HOPPER PETER J.;JOHNSON PETER;SMEYS PETER;FRENCH WILLIAM |
分类号 |
H01L23/48;H01L21/66;H01L23/544 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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