| 摘要 |
PROBLEM TO BE SOLVED: To provide a level conversion circuit which enables stable level conversion. SOLUTION: Circuit blocks 21, 22 respectively convert high-voltage logic signals with two logical values 0, 1 represented by an electric potential 0V and an electric potential HV on nodes N14, N15 into low-voltage logic signals with two logical values 0, 1 represented by an electric potential VG and an electric potential (VG+LL), and then output the logic signals from an output terminal Pout. Each transistor in the circuit block 22 is in the form where the polarity elements of the corresponding transistor in the circuit block 21 is replaced with opposite polarity elements. Owing to this, when the electric potential VG is changed and either of the circuit blocks 21, 22 is disabled to operate, the another circuit block operates normally. Consequently, stable level conversion can be accomplished. COPYRIGHT: (C)2011,JPO&INPIT |
