| 摘要 |
1276137 Analogue integration SOLABTRON ELECTRONIC GROUP Ltd 8 June 1970 [10 June 1969] 29432/69 Heading G4G In a measuring technique in which an electrical analogue signal is integrated over a time interval equal to an integral multiple of the period of a noise signal which it is desired to reject, e.g. as in digital voltmeters, control means are employed to multiply the signal as it is presented to the integrating means by a predetermined time-varying weighting function, e.g. a double ramp or a step function shown by the broken and continuous lines respectively in Fig. 3, whereby to permit the rejection of noise at more than one frequency, and to render the rejection less sensitive to a small departure of the measuring interval from an integral multiple of the noise period. Applied to an analogue-to-digital converter of known type (Fig. 4, not shown) in which, subsequent to the end of the measuring interval, a reference voltage of opposite polarity to the signal for measurement is applied to the integrator, and the time for discharge measured by the passage of clock pulses to a counter, the line applying the signal to the integrator is also connected to earth through a tree of resistors and associated switches, the switches being operated in sequence by successive pulses from a clock (Fig. 5, not shown) to provide a weighting function approximating the double ramp function of Fig. 3. For the step function of Fig. 3, a binary counter is followed by a decoder which decodes the counter states corresponding to- 3T/2, - T/2, and 0, and appropriately switches a resistor network. For a step function having only a few steps, such as that of Fig. 3, the weighting may alternatively be performed on the digital side of the analogue-to-digital converter, e.g. if a voltage-to-frequency converter feeds a counter, such that the digital count accumulated during the measuring interval corresponds to the integral of the signal, the decoder controls switches which route pulses either direct to the counter, or through a divideby-three circuit (Fig. 8, not shown). |
