发明名称 SHARING BANDWIDTH OF A SINGLE PORT SRAM BETWEEN AT LEAST ONE DMA PERIPHERAL AND A CPU OPERATING WITH A QUADRATURE CLOCK
摘要 A dual or triple access interface (e.g., hardware and software implementation) allows a CPU and at least one DMA peripheral, e.g., Universal Serial Bus (USB) DMA engine, to transfer data in and/or out of a common single port SRAM by negotiating access requests between the CPU and the DMA peripheral, and then subsequently forms memory cycles to the single port SRAM to satisfy both the CPU's and DMA peripheral's memory access throughput requirements. This allows the CPU and the at least one DMA peripheral to access a shared single port SRAM by time multiplexing granted accesses between, for example, two or three simultaneous memory access requests, thus eliminating the need for a dual port memory.
申请公布号 KR20100117564(A) 申请公布日期 2010.11.03
申请号 KR20107014531 申请日期 2009.03.03
申请人 MICROCHIP TECHNOLOGY INC. 发明人 YUENYONGSGOOL YONG;WOJEWODA IGOR
分类号 G06F13/16;G06F12/00;G06F13/14;G11C11/41 主分类号 G06F13/16
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