发明名称 PARTITIONED THROUGH-LAYER VIA AND ASSOCIATED SYSTEMS AND METHODS
摘要 <p>PARTITIONED THROUGH-LAYER VIA AND ASSOCIATED SYSTEMS AND METHODS Partitioned vias, interconnects, and substrates that include such vias and interconnects are disclosed herein. In one embodiment, a substrate has a non-conductive layer and a partitioned via formed in a portion of the non-conductive layer. The non-conductive layer includes a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section and a second section. The partitioned via includes a first metal interconnect within the via on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall and electrically isolated from the first metal interconnect. In another embodiment, the first metal interconnect is separated from the second metal interconnect by a gap within the via hole.</p>
申请公布号 SG150410(A1) 申请公布日期 2009.03.30
申请号 SG20070064140 申请日期 2007.08.31
申请人 MICRON TECHNOLOGY, INC. 发明人 KHENG LEE TECK
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