Memory employing multiple enable/disable modes for redundant elements and testing method using same

摘要

A memory includes a memory array having a plurality of storage elements; a plurality of replacement storage elements; a plurality of address storage units, each operable to store a replacement address associated with a respective one of the replacement storage elements; a plurality of enable storage units, each operable to store at least first and second enable bits associated with a respective one of the replacement storage elements; and a decode unit operable to (i) activate one of the replacement storage elements when the at least first and second enable bits associated therewith are in an enable state and an input address matches the replacement address associated with the replacement storage element, and (ii) deactivate the replacement storage element when the at least first and second enable bits associated therewith have changed to a disable state.