发明名称 Timing adjustment method and apparatus for semiconductor IC tester
摘要 A comparator (30) is connected through switches (13, 14 and 15) with two or more drive-only pins, and the comparator 30 is shared by two or more drive-only pins by changing the switches (13, 14 and 15). The switches are changed one by one and the signal judgment system deskew is carried out on the drive-only pin, which is connected with the comparator. Then, the switches are changed one by one similarly and the signal supply system deskew is carried out using the result of the signal judgment system deskew. Even if the semiconductor IC tester has the drive-only tester pins, the timing adjustment can be performed by carrying out the signal judgment system deskew and the signal supply system deskew.
申请公布号 US6448799(B1) 申请公布日期 2002.09.10
申请号 US20000597108 申请日期 2000.06.20
申请人 HITACHI ELECTRONICS ENGINEERING CO., LTD. 发明人 NIWA HIROMASA
分类号 G01R31/319;G01R31/3193;(IPC1-7):G01R31/02 主分类号 G01R31/319
代理机构 代理人
主权项
地址