Reorder buffer employed in a microprocessor to store instruction results having a plurality of entries predetermined to correspond to a plurality of functional units,申请号US19990458816-传众专利搜索

发明名称	Reorder buffer employed in a microprocessor to store instruction results having a plurality of entries predetermined to correspond to a plurality of functional units
摘要
申请公布号	US6134651(A)	申请公布日期	2000.10.17
申请号	US19990458816	申请日期	1999.12.10
申请人	ADVANCED MICRO DEVICES, INC.	发明人	WITT, DAVID B.;TRAN, THANG M.
分类号	G06F9/38;G06F9/46;G06F12/12;(IPC1-7):G06F15/00	主分类号	G06F9/38
代理机构		代理人
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