CMOS input buffer protection circuit

摘要

A low voltage CMOS input buffer protection circuit that is used to protect an input buffer from any high voltage signal (e.g., 5 V) that may appear along a signal bus. The protection circuit is also "hot-pluggable", meaning that the protection circuit will not draw any current when not powered (i.e., when VDD is not present). The circuit includes a CMOS transmission gate and utilizes on-chip generated reference voltages to provide the necessary protection.