| 摘要 |
An apparatus comprising a first circuit configured to receive a first clock signal and delaying the first clock signal by a first delay to generate a second clock signal, the first delay being a first function of a first signal; a phase-frequency detector configured to receive the first clock signal and the second clock signal and generate a second signal dependent on the first delay; a second circuit configured to receive tile second signal and generate a third signal, the third signal being a digital signal; and a current mirror configured to generate the first signal, the first signal being a second function of the third signal.
|
