Synchronous graphic RAM having block write control function

摘要

A synchrous graphic RAM having a block write control function, includes a column decoder for selecting a column line; a column predecoder for outputting a signal for controlling the operation of the column decoder; and a column predecoder switching portion for outputting a signal for controlling the operation of the column predecoder. The predecoder switching portion has an input stage receiving a signal enabled during read or write operation so as to perform block write operation through the column decoder's enable pulsewidth control; a delay portion for variably delaying the input signal separately for normal write and block write; and an output stage for finally outputting the output signal through the delay as the column predecorder control signal.