发明名称 |
Method of forming bit lines having lower conductivity in their respective edges |
摘要 |
A buried bit line ROM is disclosed having orthogonal sets of buried bit lines and polysilicon word lines. Polysilicon spacers are disposed on either side of each of the bit lines. The polysilicon spacers are slightly doped. The bit lines have a doping profile so that the edges of each bit line is doped less and the center of each bit line is doped more.
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申请公布号 |
US5672532(A) |
申请公布日期 |
1997.09.30 |
申请号 |
US19940242787 |
申请日期 |
1994.05.16 |
申请人 |
UNITED MICROELECTRONICS CORPORATION |
发明人 |
HSUE, CHEN CHIU;HONG, GARY |
分类号 |
H01L21/8246;(IPC1-7):H01L21/265 |
主分类号 |
H01L21/8246 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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