| 摘要 |
PROBLEM TO BE SOLVED: To achieve a high failure detection of an LSI including a multi- functional and complex circuit by performing a scan path test to the flip flop (F/F) of 1-phase synchronization clock operation within an LSI as well as F/F in multiple-phase clock operation. SOLUTION: The large-scale circuit testing system has F/Fs 1, 2, 5, and 6 for master/slave scan path, a clock generation circuit 4 for generating a bi-phase clock with different leading edges as a scan clock, and a selector 3 for switching a clock on normal operation and a scan clock by a mode selection signal. Then, a selector 7 for switching scan clock is inserted at the previous stage of the F/F 6 which is operated by a clock with a phase which is different from that of the F/Fs 1, 2, and 5 for scan path in normal operation and the selector 7 is switched to a scan clock when testing the scan path, thus forming a scan path including the F/F 6. |
