Sense circuitry.

摘要

A programmable array logic (PAL) 46) comprises input lines (20) connected to product lines (22) via FAMOS transistors (24). The product line (22) is selectively connected to a sense node (50) through a N-channel transistor (48) which is controlled by an ITD signal. The sense node (50) is pulled high in standby node by N-channel transistors (52,54). A latch (56) stores the state of sense node (50) responsive to the ITD signal. <IMAGE>