| 摘要 |
PURPOSE:To reduce parasitic resistance and to implement high speed and high performance, by forming source and drain electrodes of a FET by using cut of vacuum evaporation, with a gate electrode and a sidewall film, which is formed on the top part of the sidewall of said electrode, as masks. CONSTITUTION:A gate electrode 13 comprising tungsten silicide is formed on a GaAs semi-insulating substrate 11 having an active layer 12. At this time, the sidewall of the electrode 13 is formed approximately vertically. Alkylsylanol solution is applied on the entire surface and baking is performed. Thus an insulating film 14 is formed. Then, a part of the electrode 13 is exposed by RIE using plasma 15. Thereafter, an Si nitride film is formed on the entire surface by P-CVD, and an insulating film 16 is provided. A sidewall film 16a comprising an insulating film 16 is formed on the sidewall of the electrode 13 by RIE using plasma 17. Then the insulating film 14 is removed with fluoric acid buffer solution, and a T-shaped pattern having an overhang length l with respect to the electrode 13 is formed. Then, with resist 18 and the T-shaped pattern as masks, Au-Ge alloy is evaporated, and a drain electrode 19 and a metal film 19a are formed. The resist 18 is removed.
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