发明名称 |
CONTROL SYSTEM FOR LOCK BETWEEN PROCESSORS |
摘要 |
PURPOSE:To eliminate the need for a lock register by providing the condition where only the lock type of its processor is on and a wait time for buffer invalidation processing. CONSTITUTION:The control table 1 of a main storage device has lock bytes LBI... corresponding to respective processors. The processors operate routines for searching the control table on the main storage all the time. The lock byte operation means 2 of each processor accesses and turns on the lock byte for the processor. A time waiting means 3 performs processing for waiting for the time required for the propagation of buffer invalidation processing. A lock byte inspecting means 4 reads out and inspects all lock bytes to check whether or not only the lock byte for its own processor is ON. A table update means 5 updates the control table 1. |
申请公布号 |
JPS62298866(A) |
申请公布日期 |
1987.12.25 |
申请号 |
JP19860142564 |
申请日期 |
1986.06.18 |
申请人 |
FUJITSU LTD |
发明人 |
KURIBAYASHI NOBUHIKO;CHIBA TAKASHI;MASUDA JITSUO |
分类号 |
G06F15/16;G06F9/46;G06F9/52;G06F12/08;G06F15/177 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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