发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the sizes of the contact part of a wiring metal with a shallow diffusion depth at a diffused layer of an Si single crystal substrate and wires by forming a polycrystalline silicon layer between the metal and the diffused layer at the contact part. CONSTITUTION:A field SiO2 32, a gate SiO2 33 and a polycrystalline Si gate electrode 34 are formed on a P type Si single crystal substrate 31. Further, an N<+> type diffused layer 35, a CVD SiO2 36 and a polycrystalline Si layer 40 are formed. A thermal diffusion is performed from above the layer 40, a deep N<+> diffusion 39 is formed, the layer 40 of the contact part remains, and the others are removed. Subsequently, an aluminum wire 37 is formed, and a CVD SiO2 38 are formed on the wire. In this manner, diffused layers of source and drain adjacent to the gate electrode can be formed as shallow as possible. Even in the formation of the deep diffused layer, the contact is formed in a self-aligning structure, and special matching margin is not necessitated.
申请公布号 JPS57208173(A) 申请公布日期 1982.12.21
申请号 JP19810094312 申请日期 1981.06.18
申请人 SUWA SEIKOSHA KK 发明人 ICHIKAWA MATSUO
分类号 H01L29/78;(IPC1-7):01L29/78 主分类号 H01L29/78
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