发明名称 TIME SWITCH CIRCUIT
摘要 PURPOSE:To improve the throughput of a time switch circuit in a channel device of a digital exchange by outputting in parallel with a output of a demultiplexer with storage function and a shift register. CONSTITUTION:A storage memory 13 applies an address ADR to the demultiplexer 11 with storage function in synchronizing with a clock pulse CLK. The demultiplexer 11 with storage function consists of an input data latch 11-1, a demultiplexer 11-2, and a latch 11-3. An input data Din in time-division multiplex is inputted sequentially to the input data latch 11-1 and stored in the latch 11-1. The demultiplexer 11-2 outputs the data stored in the latch 11-1 to an output terminal designated by the address ADR from the storage memory 13 and the output terminal not designated is brought into high impedance state. The data from the output terminal of the demultiplexer 11-2 is stored in the latch 11-3. The stored data of the latch 11-3 is fetched in parallel with the shit register 12 and outputted as a sequential output data Dout in series.
申请公布号 JPS59111499(A) 申请公布日期 1984.06.27
申请号 JP19820221391 申请日期 1982.12.17
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 NIKAIDOU TADANOBU
分类号 H04Q3/52;H04Q11/04 主分类号 H04Q3/52
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