发明名称 MEMORY MANAGEMENT IN A RECEIVER/DECODER
摘要 <p>A device management module (11) particularly for use in a receiver/decoder for a broadcast digital television system in which received signals are passed through a receiver to the receiver/decoder and thence to a television set. The module (11) couples incoming messages from port units (10) to application modules (12). A memory (13) coupled to the unit (11) has a buffer area (13-B) and a FIFO area (13-F), controlled by a buffer controller/handler (14-B) and a FIFO controller/handler (14-F) respectively. An incoming message can be passed into a buffer, and retrieved from the buffer by the application to which it is directed; two different operating modes are available for this. Alternatively, such a message can be passed to a FIFO; the FIFO handler acts as a low-level application which can pass the message on to a high-level application without that application having to take any action and without having to wait for the full message to be received. Messages passing through the FIFO are may be combined into an MPEG signal stream.</p>
申请公布号 WO1999051021(A1) 申请公布日期 1999.10.07
申请号 IB1999000650 申请日期 1999.03.29
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