| 摘要 |
The invention concerns a device comprising a virtual RAM area ( 4, 5 ), which is reserved and dedicated to the processing of multitrack flows, comprising a switcher process ( 27 ) defining at least one memory line, and multiple flow management processes (PGF 1 -PGF 5 ), creating or using at least one synchronized buffer in at least one memory line. An administration module ( 32 ) synchronizes the successive use of the synchronized buffers of each memory line by the various active processes, as a function of the use sequence which the switcher process ( 27 ) determines. |
