Bus monitor circuit and bus monitor method

摘要

A bus monitor circuit includes an access info information/write data FIFO and a read data FIFO to produce a bus monitor output signal on a bus transmitting data between a master and a slave. In a write access ascribed to an attribute of the access information stored at a header of the access information/write data FIFO, the bus monitor circuit directly outputs a bus monitor output signal indicating the access information accompanied with the corresponding write data which is transmitted in the same cycle. In a read access ascribed to an attribute of the access information, the bus monitor circuit waits for the read data FIFO storing the corresponding read data, and then outputs a bus monitor output signal indicating the access information paired with the read data in the same cycle. This guarantees the occurrence order of bus access according to a bus interface protocol enabling pipeline transmission.

主权项

1. A bus monitor circuit that produces a bus monitor output signal on a bus transmitting data between a master and a slave, said bus monitor circuit comprising:
a first FIFO; a second FIFO that operates at a different timing than the first FIFO; a controller that controls the first FIFO and the second FIFO; and a selector that selects write data or read data, wherein the controller sequentially stores access information corresponding to an occurrence order of bus accesses for both read and write accesses, transmitted on the bus from the master to the slave, thereafter, the controller waits for an output enable state to be established with the first FIFO or the second FIFO, so that the controller controls the first FIFO or the second FIFO to output write data or read data in response to a write access or a read access specified by an attribute of the access information stored at a header of the first FIFO while controlling the first FIFO to output the access information, and wherein the selector selects either write data or read data according to the attribute of the access information so as to output the selected data paired with the access information in a same cycle.