发明名称 PROMOTION OF PARTIAL DATA SEGMENTS IN FLASH CACHE
摘要 For efficient track destage in secondary storage in a more effective manner, for temporal bits employed with sequential bits for controlling the timing for destaging the track in a primary storage, a preference of movement to lower speed cache level is implemented based on at least one of an amount of holes and a data heat metric. If a first bit has at least one of a lower amount of holes and a hotter data heat metric, it is moved to the lower speed cache level ahead of a second bit that has at least one of a higher amount of holes and a cooler data heat. If the first bit has a hotter data heat and greater than a predetermined number of holes, the first bit is discarded.
申请公布号 US2015095561(A1) 申请公布日期 2015.04.02
申请号 US201414565774 申请日期 2014.12.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BENHASE Michael T.;BLINICK Stephen L.;ELEFTHERIOU Evangelos S.;GUPTA Lokesh M.;HAAS Robert;HU Xiao-Yu;KALOS Matthew J.;KOLTSIDAS Ioannis;NIELSEN Karl A.;PLETKA Roman A.
分类号 G06F12/08;G06F12/02 主分类号 G06F12/08
代理机构 代理人
主权项 1. A method for promoting partial data segments in a computing storage environment having lower and higher speed levels of cache by a processor, comprising: configuring a data moving mechanism adapted for performing: implementing a preference for movement of the partial data segments to the lower speed cache level based on at least one of an amount of holes and a data heat metric, wherein: a first of the partial data segments having at least one of a lower amount of holes and a hotter data heat metric is moved to the lower speed cache level ahead of a second of the partial data segments having at least one of a higher amount of holes and a cooler data heat; andif the first of the partial data segments has a hotter data heat and greater than a predetermined number of holes, the first of the partial data segments is discarded.
地址 Armonk NY US