| 摘要 |
PROBLEM TO BE SOLVED: To improve clock accuracy for a synchronous line at data transmission from an asynchronous line to the synchronous line.SOLUTION: An A/S converter 14 includes: a packet receiver unit 24 for receiving a packet and a clock packet from an asynchronous line 20; a clock generator unit 26 for generating a clock signal; a control unit 40 for controlling the clock generator unit 26 according to the clock packet and the clock signal timing and for adjusting the clock signal timing; and a data buffer 46 as a transmission unit for transmitting to a second synchronous line 22 data included in the packet according to the clock signal timing after the adjustment. |
