Five-port topology for direct down-conversion

摘要

The underlying invention generally relates to the field of five-port receivers, especially to a new topology for a five-port junction device (11) with three power sensors (PD1, PD2 and PD3) to be applied to the processing and direct downconversion of broadband RF signals within an operation bandwidth between 1 and 7 GHz. Thereby, said receiver does not need any additional passive (resistive) network, which leads to a significant increase in the overall signal-to-noise (S/N) performance. Compared to receivers with a resistive five-port topology according to the state of the art, a non-optimized structure sensitivity enhancement (system gain) of 8-9 dB can be observed. Since a simpler technology is employed, a significant decrease in microchip size (of more than 50 %) can be achieved. The key issue of the proposed solution is to connect power detectors (PD1, PD2 and PD3) in a PI -type network topology, and to attach resistive and/or reactive components - e.g. a combination of two or more parallel and/or series-connected resistors (R), capacitors (C) and/or inductors (L) or a transmission line (1a) of a specific length, which is usually placed outside of the microchip (10) - between two connection nodes (A and B). The actual matching of the power detectors (PD1, PD2 and PD3) does not play an important role due to the calibration procedure. Thus, the main issue is how to get the highest possible power with minimum losses to the detector sources (PD1, PD2 and PD3) while approving the same method of phase shifting as conventional solutions.