| 摘要 |
A NAND type flash memory device including a word line decoder is disclosed. The word line decoder includes a row decoder, a control unit and a driving unit. The row decoder receives an address of a given memory cell to produce a signal informing whether the memory cell is selected. The control unit outputs a positive or a negative voltage according as the memory cell was selected or not. The driving unit has NMOS transistors for outputting the negative voltage from sources to drains if the positive voltage outputted from the control unit is applied to gates of the NMOS transistors. The NMOS transistors prohibits the negative voltage inputted to the sources from being outputted to the drains if the negative voltage from the control unit is applied to the gates. The negative voltage inputted to the sources is applied to a P well of the NMOS transistors.
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