| 摘要 |
One embodiment of the present invention provides a system that facilitates error correction within a register file in a central processing unit (CPU). During execution of an instruction by the CPU, the system retrieves a dataword and an associated syndrome from a source register in the register file. Next, the system uses information in the dataword and the associated syndrome to detect, and if necessary correct, an error in the dataword or associated syndrome. Note that this error detection and correction takes place in parallel with using the dataword to perform a computational operation specified by the instruction. If an error is detected, the system prevents the instruction from performing a writeback to a destination register in the register file. The system also writes a corrected dataword to the source register in the register file. Next, the system flushes the instruction pipeline, and restarts execution of the instruction so that the corrected dataword is retrieved for the computational operation.
|
