ESD PROTECTION CIRCUIT FOR USE IN RF CMOS IC DESIGN

摘要

An improved method is presented for adding ESD protection to large signal MOS circuits. Each of the ESD and the MOS devices are separately connected off chip to rigid voltage points, thereby eliminating additional capacitive loading of MOS devices. An improved RF MOS amplifier is presented which implements the method of the invention. An ESD device, comprising back to back diodes, is connected to the Vdd and GND nodes off chip, thus insulating the amplifying transistor from any performance degradative interaction with the ESD device due to transient forward biasing. The method and apparatus are easily extended to circuits comprising any number of MOS devices.