发明名称 MEMORY CONTROL STRUCTURE
摘要 PROBLEM TO BE SOLVED: To improve the operating frequency of a microprocessor. SOLUTION: A computer with a page table storing a plurality of address conversion information comprises a memory control structure for conversion of virtual and physical page addresses. There are provided a TLB1 (1) storing at least one of the address conversion information, a TLB2 (1000) storing more address conversion information than TLB1 (1), a second control section (31) which reads the address conversion information being stored in the page table and controls to register the read address conversion information into a second address conversion buffer, and a first control section (9) which inputs the address conversion information when the second control section (31) registers the address conversion information and controls to register the input address conversion information into the TLB1 (1). Furthermore, the TLB1 comprises a merging application section (3) which performs the merging application of the address conversion information for registration.
申请公布号 JP2002132581(A) 申请公布日期 2002.05.10
申请号 JP20000325028 申请日期 2000.10.25
申请人 MITSUBISHI ELECTRIC CORP 发明人 MORI ATSUSHI
分类号 G06F12/10;G06F12/12;(IPC1-7):G06F12/10 主分类号 G06F12/10
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