发明名称 VARIABLE LENGTH SHIFT REGISTER CIRCUIT
摘要 PURPOSE:To execute delay as shown by a set value while preventing malfunction by providing plural shift register blocks and a specified selectors and providing specified switches on the input sides of the respective shift register blocks. CONSTITUTION:Plural shift register blocks 1-1-1-n and selectors 2-1-2-n are provided corresponding to the respective shift register blocks 1-1-1-n, to select either the output signals of the shift register blocks 1-1-1-n or the input side signals of the shift register blocks 1-1-1-n. On the input sides of the respective shift register blocks 1-1-1-n, switches 3-1-3-n are provided to change over the signals either to the input sides of the shift register blocks 1-1-1-n or to the input sides of the selectors 2-1-2-n passing the shift register blocks 1-1-1-n. After switching the number of register steps, the signal remaining in a shift register circuit is prevented from outputting. Thus, delay can be executed as shown by the set value while preventing malfunction.
申请公布号 JPH0470135(A) 申请公布日期 1992.03.05
申请号 JP19900182059 申请日期 1990.07.10
申请人 FUJITSU LTD 发明人 FUKUMITSU KATSUMI
分类号 G11C19/00;H04J3/02;H04J3/06 主分类号 G11C19/00
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