| 摘要 |
<p>PURPOSE:To improve encoding efficiency by providing a controller, which controls the delay time of a delaying device and outputs the delay time for each section, and three encoders to respectively encode the output signals of an adder, subtracter and controller, and compressing an encoding signal by using correlation between input signals. CONSTITUTION:Two input signals Lti and Rti are divided to the sections of a fixed time D respectively by using a divider 10. The total sum of an absolute value in a section T1 of the output from the subtracter is computed to the input signal Rti with an mD as a parameter. Then, the delay time mD, in which a value is made minimum, is defined as the delay time optimum for the Rti in the section T1 and outputted as the data of 4 bits from the controller. Accordingly, since the absolute value of the output from a subtracter 13 in the section T1 is made small, a first encoder 15 can execute encoding by a smaller word length, for example, by one bit. Samely, concerning the second and third sections, the delay time is outputted as the data of 4 bits for each section from the controller with the mD as the parameter.</p> |
