发明名称 |
Integrated injection-logic semiconductor circuit |
摘要 |
An integrated injection-logic (IIL) semiconductor circuit with a transverse transistor and a vertical transistor is created which exhibits an additional area (19) in the vicinity of the collector areas (16, 17) of the vertical transistor (Q1) and which is arranged in such a manner that its breakdown voltage is less than that for the collector areas. The additional area (19) is electrically connected to the base area (14) of the vertical transistor (Q1), thus eliminating damage due to voltage surges. <IMAGE>
|
申请公布号 |
DE3116516(A1) |
申请公布日期 |
1982.05.27 |
申请号 |
DE19813116516 |
申请日期 |
1981.04.25 |
申请人 |
TOKYO SHIBAURA DENKI K.K. |
发明人 |
TOKUMARU,YUKUYA;KOGA,SETSUO |
分类号 |
H01L27/04;H01L21/331;H01L21/822;H01L21/8226;H01L27/02;H01L27/082;H01L29/73;(IPC1-7):H03K19/09 |
主分类号 |
H01L27/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|