发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To obtain a means performing high speed access for a memory cell corresponding to an address signal in a semiconductor memory having a redundancy circuit. SOLUTION: This device is provided with a address pre-decoder 20 for selecting and driving a normal word and a redundancy control circuit 40 performing discrimination processing as to whether a redundancy word is activated or not, and they are independently controlled, respectively. Therefore, preceding control of a normal word can be performed independently of whether a redundancy word is used or not, thus operation speed of the whole device can be increased.
申请公布号 JP2000357395(A) 申请公布日期 2000.12.26
申请号 JP19990166811 申请日期 1999.06.14
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 SHIBUYA MASAHIRO
分类号 G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C11/401
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