发明名称 Transistor output circuit for logic applications
摘要 The voltlage circuit receives a high voltage (V1) and low voltage (V2), and outputs a reference voltage (V3) to two transistors (TP,TN) of PMOS and NMOS type respectively. The reference voltage allows the high voltage level to be transmitted through the transistor network (1). When a low voltage input level is set, the PMOS transition becomes non conducting, and produces a low voltage output in response to an input signal level (in).
申请公布号 FR2779293(A1) 申请公布日期 1999.12.03
申请号 FR19980016530 申请日期 1998.12.29
申请人 FUJITSU LIMITED 发明人 OKADA KOJI
分类号 H03K19/003;H03K19/0175;H03K19/0185;H03K19/0948;(IPC1-7):H03K19/017 主分类号 H03K19/003
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