| 摘要 |
<p>The present invention relates to a capacitive level sensing circuit comprising a sensing circuit unit including a variable condenser which sets a reference value by controlling capacitance and a first control unit which outputs a high signal or a low signal by comparing the reference value of the capacitance set in the variable condenser and a capacitance value measured through a first electrode and a second electrode; a delay circuit unit including a first flip-flop in which an I/O port is opened or closed according to an output signal of the first control unit, a first comparison unit which outputs a low signal or a high signal by forming a voltage flow circuit or an integration circuit as the I/O port of the first flip-flop is opened or closed; a second comparison unit which outputs a high signal or a low signal by forming the integration circuit or the voltage flow circuit as the I/O port of the first flip-flop is opened or close, and a second unit which outputs a high signal or a low signal according to an output signal of the second comparison unit; and an output circuit unit which transmits the high signal or the low signal to an external output terminal according to an output signal of the second control unit and receives a DC voltage for driving the circuit.</p> |
