发明名称 Semiconductor memory testing method
摘要 The memory testing method has a given dataword (A) entered in a memory cell of a first memory location (1) and read out for comparison with the original dataword, the dataword (B) characterising the result of this comparison entered in a memory cell of a different memory location (2) and read out for providing a redundant analysis for replacement of defective memory cells by redundant memory cells. Each of the latter memory locations is incorporated in a different memory bank of the semiconductor memory and the dataword characterising the comparison result can be stored in parallel in corresponding memory cells of at least 3 memory banks (2,3,4).
申请公布号 DE19922786(A1) 申请公布日期 2000.12.07
申请号 DE19991022786 申请日期 1999.05.18
申请人 SIEMENS AG 发明人 DAEHN, WILFRIED
分类号 G01R31/28;G01R31/3193;G06F12/16;G11C29/12;G11C29/44;(IPC1-7):G11C29/00 主分类号 G01R31/28
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