| 摘要 |
<p>A data decoder, for example for decoding teletext and VPS data, comprises an input signal clamp and synchronising signal separate circuit (2) which receives a combined video and blanking signal and produces synchronising pulses for a timing circuit (4) and video signals applied to an ADC 6 and a data slicer and clock generator (7). Sliced data and clock signals feed an acquisition circuit (8) which acquires selected data which is stored in a memory (10). A control circuit 11 is arranged to modify the DSCR (7), acquisition circuit (8) and memory interface (9) in dependence on the type of data detected. The arrangement is such that the detector is set to decode data of one type, for example teletext, and if no valid data is detected within a given period, for example four television frames, the control circuit (11) causes the decoder to attempt to decode data of the other type (VPS). <IMAGE></p> |
