Embedded substrate interconnect for underside contact to source and drain regions

摘要

A semiconductor topography ( 10 ) is provided which includes a semiconductor-on-insulator (SOI) substrate having a conductive line ( 16 ) arranged within an insulating layer ( 22 ) of the SOI substrate. A method for forming an SOI substrate with such a configuration includes forming a first conductive line ( 16 ) within an insulating layer ( 22 ) arranged above a wafer substrate ( 12 ) and forming a silicon layer ( 24 ) upon surfaces of the first conductive line and the insulating layer. A further method is provided which includes the formation of a transistor gate ( 28 ) upon an SOI substrate having a conductive line ( 16 ) embedded therein and implanting dopants within the semiconductor topography to form source and drain regions ( 30 ) within an upper semiconductor layer ( 24 ) of the SOI substrate such that an underside of one of the source and drain regions is in contact with the conductive line.