发明名称 Solid-state imaging apparatus and imaging system
摘要 A solid-state imaging apparatus includes: a comparator comparing a signal output from pixels with a reference signal of which level changes dependent on time; a plurality of first bit storage units and a plurality of second bit storage units holding, bit by bit, a count signal of the plurality of bits from a counter, according to a write control signal based on a result of the comparing by the comparator; and a control unit arranged between the comparator and the first and second bit storage units, and adjusting a delay time of the write control signal. An order of lengths of the delay time of the count signal held by the first and second bit storage units is the same as an order of lengths of the delay time of the write control signal of the first and second bit storage units.
申请公布号 US9602753(B2) 申请公布日期 2017.03.21
申请号 US201514618143 申请日期 2015.02.10
申请人 CANON KABUSHIKI KAISHA 发明人 Saito Kazuhiro;Kameyama Hiroaki;Nakamura Kohichi
分类号 H03M1/34;H04N5/378;H04N5/335;H04N5/341 主分类号 H03M1/34
代理机构 Fitzpatrick, Cella, Harper & Scinto 代理人 Fitzpatrick, Cella, Harper & Scinto
主权项 1. A solid-state imaging apparatus comprising: a plurality of pixels arranged in a matrix, and outputting a signal based on photoelectric conversion and a signal based on a reset-state; a comparator configured to compare the signal outputted from the pixel with a reference signal of which level changes dependent on time; a counter configured to output a count signal of a plurality of bits; a plurality of first bit storage units configured to hold, bit by bit, the count signal, according to a write control signal based on a result of the comparing by the comparator; a plurality of second bit storage units configured to hold, bit by bit, the count signal, according to a write control signal based on a result of the comparing by the comparator; and a control unit configured to output the write control signal, wherein the plurality of first bit storage units hold the count signal at a time of comparing the signal based on the reset-state of the pixel, the plurality of second bit storage units hold the count signal at a time of comparing the signal based on the photoelectric conversion of the pixel, and an order of lengths of a delay time of the count signal held by the plurality of first bit storage units is same as an order of lengths of the delay time of the write control signal of the plurality of first bit storage units, an order of lengths of a delay time of the count signal held by the plurality of second bit storage units is same as an order of lengths of the delay time of the write control signal of the plurality of second bit storage units.
地址 Tokyo JP