| 发明名称 |
SCHEME TO ALIGN LDMOS DRAIN EXTENSION TO MOAT |
| 摘要 |
An integrated circuit and method having an extended drain MOS transistor, wherein a diffused drain is deeper under a field oxide element in the drain than in a drift region under the gate. A field oxide hard mask layer is etched to define a drain field oxide trench area. Drain dopants are implanted through the drain field oxide trench area and a thermal drain drive is performed. Subsequently, the drain field oxide element is formed. |
| 申请公布号 |
US2015179792(A1) |
申请公布日期 |
2015.06.25 |
| 申请号 |
US201414572923 |
申请日期 |
2014.12.17 |
| 申请人 |
Texas Instruments Incorporated |
发明人 |
SRIDHAR Seetharaman |
| 分类号 |
H01L29/78;H01L29/167;H01L29/08;H01L21/762;H01L21/266;H01L21/324;H01L21/225;H01L21/027;H01L29/66;H01L29/10 |
主分类号 |
H01L29/78 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit containing an extended drain metal oxide semiconductor (MOS) transistor, comprising:
a drain field oxide element in a diffused drain region of the extended drain MOS transistor, so that the diffused drain region extends below the drain field oxide element and connects to a drift region under a gate of the extended drain MOS transistor; and an average depth of the diffused drain region from a top surface of a substrate of the integrated circuit under the drain field oxide element is at least 50 nanometers deeper than an average depth of the diffused drain region in the drift region. |
| 地址 |
Dallas TX US |
