发明名称 Integrated MOSFET Device and Method with Reduced Kelvin Contact Impedance and Breakdown Voltage
摘要 A MOSFET device and fabrication method are disclosed. The MOSFET has a drain in chip plane with an epitaxial layer overlay atop. The MOSFET further comprises: a Kelvin-contact body and an embedded Kelvin-contact source; a trench gate extending into the epitaxial layer; a lower contact trench extending through the Kelvin-contact source and at least part of the Kelvin-contact body defining respectively a vertical source-contact surface and a vertical body-contact surface; a patterned dielectric layer atop the Kelvin-contact source and the trench gate; a patterned top metal layer. As a result: a planar ledge is formed atop the Kelvin-contact source; the MOSFET device exhibits a lowered body Kelvin contact impedance and, owing to the presence of the planar ledge, a source Kelvin contact impedance that is lower than an otherwise MOSFET device without the planar ledge; and an integral parallel Schottky diode is also formed.
申请公布号 US2012068262(A1) 申请公布日期 2012.03.22
申请号 US201113306067 申请日期 2011.11.29
申请人 PAN JI 发明人 PAN JI
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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