发明名称 Apparatus, method, and system to allocate redundant components
摘要 In general, a method, apparatus, and system determine the allocation of the one or more redundant components while fault testing the memory. In an embodiment of an apparatus, one or more memories and one or more processors are located on a single chip. Each memory has one or more redundant components associated with that memory. The one or more redundant components include at least one redundant column. The one or more processors contain redundancy allocation logic having an algorithm. The algorithm determines the allocation of the one or more redundant components to repair one or more defects detected in the one or more memories while fault testing the memory.
申请公布号 US7127647(B1) 申请公布日期 2006.10.24
申请号 US20010962761 申请日期 2001.09.24
申请人 VIRAGE LOGIC CORPORATION 发明人 ZORIAN YERVANT;TORJYAN GEVORG
分类号 G11C29/00 主分类号 G11C29/00
代理机构 代理人
主权项
地址