发明名称 SIGNAL PROCESSOR
摘要 <p>PURPOSE:To perform product sum arithmetic, accumulation of the absolute values of differences, and threshold value arithmetic by one unit. CONSTITUTION:A multiplier 100 multiplies two data. A 1st mathematical computing element 200 performs addition of and subtraction between the two data, outputs the arithmetic result as a plus value, and also outputs the sign flag of the arithmetic result. One selector 9 selects the respective outputs of the multiplier 100, 1st mathematical computing element 200, and a constant register 8, and an initial value. A 2nd mathematical computing element 300 inputs the outputs of one selector 9 and the other selector 10, performs the addition and subtraction, and outputs the arithmetic result as the plus value and also outputs the sign flag of the arithmetic result. A threshold value arithmetic part 400 has a 1st and a 2nd threshold arithmetic output value and selects and outputs those values, threshold values, and input data on the basis of the sign flags of the 1st mathematical computing element 200 and 2nd mathematical computing element 300.</p>
申请公布号 JPH07168808(A) 申请公布日期 1995.07.04
申请号 JP19930342865 申请日期 1993.12.15
申请人 OKI ELECTRIC IND CO LTD 发明人 NAKAZAWA TETSUO
分类号 H04N19/60;G06F17/10;G06F17/14;G06T1/00;G06T1/20;G06T5/00;G06T5/20;H04N9/74;H04N19/42;H04N19/423;H04N19/85;(IPC1-7):G06F17/10;H04N7/30 主分类号 H04N19/60
代理机构 代理人
主权项
地址