发明名称 |
A horizontal synchronizing signal separation circuit for a display apparatus. |
摘要 |
<p>The horizontal synchronizing signal seperation circuit extracts pulses indicative of horizontal synchronizing timing from a composite synchronizing signal which includes a horizontal synchronizing signal and a vertical synchronizing signal. When detecting the rising edge of the composite synchronizing signal, a rising edge detection circuit generates a pulse signal. A counter counts the number of the pulses in a clock signal. The output of the counter is supplied to a decoder which decodes the output of the counter and outputs timing signals. Using the timing signals, a control signal is generated to control a gate to which the output of the rising edge detection circuit is supplied. The output of the gate is used for generating a separated horizontal synchronizing signal. <IMAGE></p> |
申请公布号 |
EP0461897(A2) |
申请公布日期 |
1991.12.18 |
申请号 |
EP19910305351 |
申请日期 |
1991.06.13 |
申请人 |
SHARP KABUSHIKI KAISHA |
发明人 |
OKADA, HISAO;TANAKA, KUNIAKI |
分类号 |
H04N5/10 |
主分类号 |
H04N5/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|