| 摘要 |
This transmission circuit comprises: a comparator which converts a phase modulation signal from a quadrature modulator into a pulse signal to use the pulse signal as the sampling clock of a delta-sigma modulator; and an asynchronous clock transfer unit and an interpolation circuit which are provided between a circuit that operates on a baseband clock and the delta-sigma modulator. The asynchronous clock transfer unit converts an amplitude component signal synchronized with the baseband clock into an amplitude component signal synchronized with a divide-by-N clock obtained by dividing the sampling clock by N. The interpolation circuit interpolates an output signal from the asynchronous clock transfer unit such that the amount of change of one sample in the divide-by-N clock and the amount of change of one sample in the sampling clock become the same. |
