发明名称 |
Method of calculating gate delay based on crosstalk effect due to capacitive coupling |
摘要 |
Provided is a method of exactly calculating the delay of a gate in a digital integrated circuit (IC) that drives a capacitive load and a noise current source based on a crosstalk effect due to capacitive coupling between adjacent conductive lines, the method calculates the delay of the gate by using an output waveform that sums an output waveform of a linear time-varying output resistance model generated by using a gate output resistance library generated by using input and output voltage values of the digital IC and an output waveform of a modified Thevenin equivalent model of the gate. |
申请公布号 |
US8271255(B2) |
申请公布日期 |
2012.09.18 |
申请号 |
US20090475544 |
申请日期 |
2009.05.31 |
申请人 |
BAE TAE II;KIM YOUNG HWAN;KIM JINWOOK;POSTECH ACADEMY-INDUSTRY FOUNDATION |
发明人 |
BAE TAE II;KIM YOUNG HWAN;KIM JINWOOK |
分类号 |
G06F17/50;G06F9/455;G06G7/62 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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