发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To aim at the miniaturization of a semiconductor integrated circuit device and the acceleration of the operating speed of the device and also to aim at reduction in defect density in an insulating film in the device having third gates. <P>SOLUTION: The semiconductor circuit device has a first conductivity-type well 101 formed in a semiconductor substrate 100, second conductivity type source/drain diffused layer regions 105 in the well 101, a floating gate 103b formed on the substrate 100 via an insulating film 102, a control gate 111a formed via the floating gate 103b and an insulating film 110a, a word line formed by being connected to the control gate, and a third gate 107a which is formed via the substrate, the floating gate, the control gate and the insulating film, and different from the floating gate and the control gate. In this case, the third gates are arranged in such a way that the third gate exists by being embedded in gaps between the floating gate existing in directions vertical to the word line and a channel. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006066924(A) 申请公布日期 2006.03.09
申请号 JP20050270393 申请日期 2005.09.16
申请人 RENESAS TECHNOLOGY CORP 发明人 KOBAYASHI TAKASHI;KURATA HIDEAKI;KOBAYASHI NAOKI;KUME HITOSHI;KIMURA KATSUTAKA;SAEKI SHUNICHI
分类号 H01L21/8247;G11C16/04;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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