发明名称 |
Gate insulating structure for power devices, and related manufacturing process |
摘要 |
Semiconductor power device including a semiconductor layer of a first type of conductivity, wherein a body region of a second type of conductivity including source regions of the first type of conductivity is formed, a gate oxide layer superimposed to the semiconductor layer with an opening over the body region, polysilicon regions superimposed to the gate oxide layer, and regions of a first insulating material superimposed to the polysilicon regions. The device includes regions of a second insulating material situated on a side of both the polysilicon regions and the regions of a first insulating material and over zones of the gate oxide layer situated near the opening on the body region, oxide regions interposed between the polysilicon regions and the regions of a second insulating material, oxide spacers superimposed to the regions of a second insulating material.
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申请公布号 |
US6756259(B2) |
申请公布日期 |
2004.06.29 |
申请号 |
US20020061606 |
申请日期 |
2002.02.01 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
FRISINA FERRUCCIO;FERLA GIUSEPPE |
分类号 |
G11C29/14;G11C29/50;H01L21/336;H01L21/762;H01L21/8238;H01L29/78;(IPC1-7):H01L21/823;H01L29/76 |
主分类号 |
G11C29/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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