Silicium-op-isolator (SOI) geheugen en werkwijze voor het vervaardigen hiervan.

摘要

A silicon on insulator (SOI) DRAM has a layer of buried oxide 12 covered by a thin layer of crystalline silicon on the surface of a bulk silicon substrate 10. Field oxide regions 14 are formed extending through the thin crystalline silicon surface layer and into contact with the buried oxide layer. Gate oxide layers, gate electrodes 18 and source/drain regions 24 for the transfer FETs of the DRAM are formed in and on the thin crystalline silicon surface layer in the active regions between the field oxide regions. A trench is opened through one of the source/drain regions of each of the transfer FETs. A layer of doped polysilicon is provided to line the trenches and is patterned to form at least a part of the bottom electrodes 32 of the charge storage capacitors for the DRAM. The bottom electrodes are covered with a thin dielectric layer 34 and an upper electrode 36 of doped polysilicon is provided. Preferably, the trench for the bottom capacitor electrode extends through the buried oxide layer and may extend into the bulk silicon.