发明名称 METHOD FOR CONTROLLING WATCH DOG TIMER
摘要 PURPOSE:To detect a fault of a controlling system precisely by preparing a reset requesting flag to control many tasks and finding AND with data indicating the operation status in each task to reset a watch dog timer. CONSTITUTION:A task to be used in a series processing has a self-logical watch dog timer No. and a watch dog timer reset pattern to call a subroutine WDT. The subroutine WDT turns a bit area corresponding to a reset request flat 1 corresponding to the timer No. to ''1''. If a fault is generated in a controlling system and the task is not executed, the bit area corresponding to the flag 1 is still kept at ''0''. If the timer reset pattern coincides with the contents of the reset requesting flag 1 at the completion of a series task processing, the watch dog timer is reset. Consequently, the fault of the controlling system can be precisely detected even if an important function is alloted to plural tasks.
申请公布号 JPS5917611(A) 申请公布日期 1984.01.28
申请号 JP19820126992 申请日期 1982.07.21
申请人 YOKOGAWA HOKUSHIN DENKI KK 发明人 TAKIGISHI SHINICHI;KOBAYASHI MITSURU;SANO HIDEO
分类号 G05B23/02;G06F11/00 主分类号 G05B23/02
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